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| Silan Semiconductors DTMF GENERATORS DESCRIPTION The SC9200A/B tone generators are designed for C interfaces. They can be instructed by a C to generate 16 dual tones and 8 single tones from the DTMF pin. The SC9200A provides a serial mode whereas the SC9200B contains a selectable serial/parallel mode interface for various applications such as security systems, home automation, remote control through telephone lines communication system, etc. SC9200A/B FEATURES * Operating voltage: 2.0V~5.5V * Serial mode for the SC9200A * Serial/parallel mode for the SC9200B * Low standby current * Low total harmonic distortion * 3.58MHz crystal or ceramic resonator DIP-8 SELECTION TABLE Function Part No. SC9200A SC9200B Operating Voltage 2V-5.5V 2V-5.5V OSC Frequency 3.58MHz 3.58MHz Interface Serial Serial/Parallel Package 8 DIP/SOP 14 DIP/SOP PIN CONFIGURATIONS CE X2 1 2 3 4 5 6 7 14 VDD 13 DTMF 12 DATA 11 CLK 10 S/P 9 8 D3 D2 CE X2 X1 VSS 1 5 VDD X1 SC9200B SC9200A 2 3 4 6 7 8 DTMF VSS DATA NC CLK D0 D1 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 1 Silan Semiconductors BLOCK DIAGRAM SC9200A/B X1 X2 3.58MHz Crystal/Resonator Oscillator DTMF Generator DTMF DATA CLK Serial Data Input Circuit Control Circuit Parallel Data Input Circuit CE D3 D2 D1 D0 ABSOLUTE MAXIMUM RATINGS Characteristic Supply Voltage Input Voltage Storage Temperature Operating Temperature Symbol VSS VIN TSTG TOPR Value -0.3~6 VSS-0.3~VDD+0.3 -50~125 -20~75 Unit V V C C HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 2 Silan Semiconductors ELECTRICAL CHARACTERISTICS Parameter Symbol VDD Operating Voltage VDD -2.5V Operating Current IDD 5.0V SC9200A/B Test Conditions Conditions Serial Parallel 1.8 2.0 -240 2500 -5.5 V Min Typ Max Unit S/P =VDD, D0~D3=VSS, CE =VSS, No load ---VSS 0.8VDD --120 45 -DTMF Output VDTMF=0.5V Row group, RL=5k Row group=0dB tHD-23dB RL=5k -The time from CE -0.45VDD -0.1 0.12 1 5 --950 ----180 68 tUP+6 --0.15 2 --30 100 3000 0.2VDD VDD 1 2 270 100 tUP+8 0.75VDD -0.18 3 --23 500 ms V mA Vrms dB k dB kHz k V V A A Low Input Voltage High Input Voltage Standby Current VIL VIH ISTB --2.5V 5.0V S/P , CE =VDD, No load VOL=0V Pull-high Resistance DTMF Output Delay Time (Parallel Mode) DTMF Output DC Level DTMF Sink Current DTMF Output AC Level Column Pre-emphasis DTMF Output Load Tone Signal Distortion Clock Input Rate (Serial Mode) Oscillator Starting Time (When CE is low) System Frequency RP 2.5V 5.0V tDE VTDC ITOL VTAC ACR RL tHD fCLK 5V 2V~5.5V 2.5V 2.5V 2.5V 2.5V 2.5V -- tUP 5.0V falling edge to normal oscillator operation -- -- 10 ms fOSC -- Crystal=3.5795MHz 3.5759 3.5759 3.5831 MHz HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 3 Silan Semiconductors PIN DESCRIPTIONS Pin NO. 1 2 3 4 5 SC9200A/B Description Chip enable, active low The system oscillator consists of an inverter, a bias resistor, Pin Name CE I/O I O I --- Internal Connection CMOS IN Pull-high X2 X1 VSS NC Oscillator and the required load capacitor on chip. The oscillator function can be implemented by Connect a standard 3.579545MHz crystal to the X1 and X2 terminals. Negative power supply. No connection. Data inputs for the parallel mode. When the IC is operating in the serial mode, the data input terminals (D0~D3) are included with a pull-high resistor. When the IC is operating in the parallel mode, these pins become floating. Operation mode selection input --- 6~9 D0~D 3 I CMOS IN Pull-high or floating 10 S/P I CMOS IN S/P ="H": Parallel mode S/P ="L": Serial mode Data synchronous clock input for the serial mode. When the IC 11 CLK I CMOS IN Pull-high or floating is operating in the parallel mode, the input terminal (CLK) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating. Data input terminal for the serial mode. When the IC is 12 DATA I CMOS IN Pull-high or floating CMOS OUT -operating in the parallel mode, the input terminal (DATA) is included with a pull-high resistor. When the IC is operating in the serial mode, this pin becomes floating. 13 14 DTMF VDD O -Output terminal of the DTMF signal Positive power supply, 2.0V~5.5V for normal operation HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 4 Silan Semiconductors FUNCTIONAL DESCRIPTION SC9200A/B The SC9200A/B are DTMF generators for C interfaces. They are controlled by a C in the serial mode. 1. Serial mode (SC9200A/B) The SC9200A/B employ a data input, a 5-bit code, and a synchronous clock to transmit a DTMF signal. Every digital of a phone number to be transmitted is selected by a series of inputs that consist of 5-bit data. Of the 5 bits, the D0 (LSB) is the first received bit. The SC9200A/B will latch data on the falling edge of the clock (CLK pin). The relationship between the digital codes and the tone output frequency is shown in Table 1 as for the control timing diagram, refer to Figure 1. Table 1: Digits vs. input data vs. tone output frequency (serial mode) Digit 1 2 3 4 5 6 7 8 9 0 * # A B C D --------DTMF OFF D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 D3 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 1 D2 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 1 1 1 D1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 1 1 0 0 1 1 1 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1 Tone Output Frequency (Hz) 697+1209 697+1336 697+1477 770+1209 770+1336 770+1477 852+1209 852+1336 852+1477 941+1336 941+1209 941+1477 697+1633 770+1633 852+1633 941+1633 697 770 852 941 1209 1336 1477 1633 -- *Notes: The codes not listed in Table 1 are not used D4 is MSB. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 5 Silan Semiconductors SC9200A/B S/P X2 (Oscillator) CE tUP CLK LSB DATA Digit 1 DTMF Digit 1 DTMF signal Digit2 DTMF signal Digit 2 MSB LSB MSB LSB MSB 11111 Stop code Figure 1 2. Parallel mode (SC9200B) The SC9200B provides four data inputs D0~D3 to generate their corresponding DTMF signals. The S/P has to be connected high to select the parallel operation mode. Then the input data codes should be determined. Finally, the CE is connected low to transmit the DTMF signal from the DTMF pin. The TDE time (about 6ms) will be delayed from the CE falling edge to the DTMF signal output. The relationship between the digital codes and the tone output frequency is illustrated in Table 2. As for the control timing diagram, see figure 2. When the system is operating in the parallel mode, D0~D3 are all in the floating state. Thus, these data input pins should not float. HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 6 Silan Semiconductors SC9200A/B D1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 Table 2: Digits vs. input data vs. tone output frequency (parallel mode) Digit 1 2 3 4 5 6 7 8 9 0 * # A B C D D3 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 D2 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 Tone Output Frequency 697+1209 697+1336 697+1477 770+1209 770+1336 770+1477 852+1209 852+1336 852+1477 941+1336 941+1209 941+1477 697+1633 770+1633 852+1633 941+1633 S/P X2 (Oscillator) CE D0~D3 DTMF tDE tDE *Note: The data (D0~D3) should be ready before the CE becomes low. Figure 2 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 7 Silan Semiconductors Tone frequency SC9200A/B Actual 699 766 847 948 1215 1332 1472 Output Frequency (Hz) Specified 697 770 852 941 1209 1336 1477 %Error +0.29% -0.52% -0.59% +0.74% +0.50% -0.30% -0.34% % Error does not contain the crystal frequency drift APPLICATION CIRCUIT Serial mode VDD VDD VDD CE CLK 3.579545MHz 1 CE 2 X2 VDD 5 DTMF 6 DATA 7 CLK 8 Tone output VSS DATA 20pF 20pF 3 X1 4 VSS C SC9200 Serial/parallel mode VDD VDD VDD CE D0 D1 D2 D3 S/P CLK 20pF 20pF 3.579545MHz 1 CE 2 X2 3 X1 4 VSS 5 NC 6 D0 7 D1 VDD 14 DTMF 13 DATA 12 CLK 11 S/P 10 D3 9 D2 8 Tone output VSS DATA SC9200A/B C HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 8 Silan Semiconductors PACKAGE OUTLINE SC9200A/B UNIT: mm 2.54 DIP-8-300-2.54 6.40 1.25 9.20 15 degree 3.40 0.46 DIP-14-300-2.54 2.54 3.30 5.08 7.62 0.25 UNIT:mm 6.40 1.50 19.4 7.62 15 degree 3.51 0.46 HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD Rev: 1.0 2001.02.02 9 3.30 5.08 0.25 |
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